MOS Transistor Mismatch for High Accuracy Applications

In this paper the matching behaviour of MOS transistors is analyzed for the realization of an intrinsic– accuracy 14 bit current–steering D/A–converter. It is well known that the area of a MOS transistor is inversely proportional to the mismatch (Pelgrom mismatch model), related through a technology constant. Also the influence of metal coverage on the mismatch of MOS transistors has been reported. In this work these results are verified. A test chip has been processed and measured. It is an actual implementation of a D/A-converter. From the static linearity measurements the mismatch behavior is extracted, including metal coverage and edge effects. The resulting mismatch error behaviour is important information for the design of future high–accuracy circuits. This work paved the ground for the design of the first intrinsic 14 bit accuracy D/A-converter in CMOS known to the authors.